MIPS processor construction is a kind of manycore processors thought of as the normal model architecture of processor in the traditional computer class architecture particularly for undergraduate learners (Park et al., 2013). MIPS processors can be pipelined or non pipelined (unpipelined types). This paper compares pipelined versus unpipelined MIPS processors in terms of the insertion of forwarding and branch prediction hardware with consideration of FPGA platform. The comparison is also done in terms of cost/area and frequency of processor. The final comparison is also done based on the CPU time of the two types of MIPS processors. It was found that the two types of processors have different performance at different situations. The unpipelined MIPS processor has the shortest CPU time because of its direct mapping of cache controller to the CPU. The pipelined MIPS processor can perform better when several instructions are to be executed at the same time and when the maximum depth of pipeline is used to enhance the frequency of the processor.

Introduction to MIPS processor on an FPGA

The design of MIPS processor is normally regarded as the typical structural design of the processor model in the context of the usual class of computer architecture for undergraduate students.  The design are developed in such a way that they make use of parallel applications that are easy enough to permit the students to appreciate the whole design of manycore processor and to be able to learn its fundamental parts together with the fundamental structural design of communication ( Park et al., 2013).

Don't use plagiarized sources. Get Your Custom Essay on
Comparing Unpipelined Vs. Pipelined MIPS
Just from $9/Page
Order Essay

The programmable FPGA devices can also be used in the processor design since it can allow the students to make the real working processor chip by means of downloading the plans to the FPGA. This is very different from simply conducting a test based on the simulation of the software. The device for FPGA also offers a fast test cycle and amendment ability that is simpler. As a result, the learners can be able to practice every process of real processor design through working on plan, completion, testing and even debugging processors by means of commercial FPGA improvement boards. The plan can also be used to implement FPGA with a small power pipelined processor especially for the 32-bit model of RISC core. The components of the pipelined MIPS architecture consist of control logic, register blocks, and memory, low power unit and datapath. The registers, addresses, layouts and instruction sets among others defines the architecture of the processor for MIPS. On the other hand, the way in which various processors employ the architecture in the construction of the model defines the implementation of the hardware part of it (Park et al., 2013, Bhosle & Moorthy, 2012).

Unpipelined MIPS processor

Unpipelined MIPs processor involves the straight mapping of the controller for cache for microprocessor without the pipeline stages that are interlocked. This comprises of the use of extremely high rate hardware narrative language plan. In this case, both the instruction for cache together with data cache is detached from each other and is situated within the central part of central processing unit. After concluding with the construction of cache for the controller, it is later joined with the processor for the pipelined MIPS and used in the execution of the program. The fusion of the processor design can be accomplished using 13.4 version of design suit for the Xilinx ISE. The simulation is then carried out by means of a simulator called Xilinx Isim (Mahmood & Omran, 2013). In addition, it should be noted that the core of unpipelined MIPS consists of simple and competent structural design (El Kateeb, 2013).

Pipelined MIPS processor

Pipelining refers to the method that permits the execution of many instructions simultaneously. In this case, many sections of the instructions which are successive in nature are performed at the same time. Pipelining is extensively employed in the architectural design of microprocessor with an aim of enhancing the processor performance as well as to enhance the use of resources for hardware. As mentioned earlier in the introduction, the components of the pipelined MIPS structural design comprises of control logic, register blocks and memory, low power unit and datapath (Han, He & Li, 2012). The core advancement of pipelined MIPS can also be employed for the pending generation network of sensor motes in order to sustain enhanced performance in processing, isolated design alterations, and mixed wireless sensor networks. The design of pipelined MIPS involves decomposing the IF instruction fetch, decoding instruction, instruction execution, memory input, and output and write back respectively (Bhor, Priya & Malathi, 2014).

Pipelined MIPS processor by inserting Forwarding hardware

The pipelined MIPS processor comprises of general parts in the design of the pipeline. They include registers for the pipeline, controller, the hazard discovery parts as well as logics for hazard reduction. The logics for hazard reduction include the forwarding approached like execution to execution forwarding and memory to execution forwarding. Apart from that, there is also a module for memory to memory forwarding that can be put into action in order to remove the possible hazard within the stage of memory (Han, He & Li, 2012). Both the dynamic and elaborate static forwarding can be very sophisticated. On the other hand, the use of a controlled or constrained forwarding method can be simpler and can bring about considerable general performance enhancement. Instead of adding the path of forwarding from all stages after the stage of decode back to the stage input of execution, one or a single path can be taken into an account. The forwarding process can also be used to indicate how the consecutive program instructions can begin earlier in the pipeline. The insertion of forwarding hardware can reduce the number of NOPs needed to resolve the successive instruction dependencies. The use of simple data forwarding thus reduces the instruction counts by 4 to 30 percent for the case of fixed or constant path of forwarding (Cheah, Fahmy & Kapre, 2014).

Data hazard takes place when the outcome of the previous instruction is required within the pipeline prior to its availability or accessibility. The forwarding of register with pipeline interlock are used as the appropriate methods for evading corruption of data and to control the performance penalty that comes as a result of data hazards within the processors that are pipelined (Bernardi et al., 2013).

Pipelined MIPS processor by inserting Forwarding and Branch Prediction hardware

As mentioned above, the insertion of hardware for forwarding helps in reducing the number of NOPs needed to resolve the consecutive instruction dependencies, that is, reducing the number of instruction counts. The inclusion of branch hardware will help in the prediction of whether the branch ought to be taken or not. The outcome from the branch target buffer and the branch predictor direction is utilized in the determination of the branch direction. The inclusion of the branch hardware predictor is also used to avoid misprediction. The misprediction price or penalty for the branch is two cycles given that the instruction for the branch is succeeded by the delay branch slot of the instruction of the branch according to MIPS. The cache instruction is realized for access in two cycles by means of way prediction. The first clock cycle that is predicted by way predictor with a group of related cache is normally indexed. In the second cycle, the tag comparison is conducted to find out the data miss or data hit. Considering misprediction, the pipeline will be slowed down or hindered as the remaining ways of instruction cache is accessed (Rajendra, 2015).

Comparing the cost (area) and frequency of these Processors with each other

The cost (area) in this case is proportional to frequency. This is because the soft processors of FPGA which attains high frequency at a time when it is planned or constructed about some particular abilities of mixed resources within the platform of present or new FPGA whose performance is realized at high cost of using deep pipelines. This can in turn bring about a larger number of cycles that are idle during program execution by means of long chains of dependency within the sequence of instruction. This also implies that the architecture of the FPGA has to be considered when trying to take advantage of performance in the processor design. The use of low frequency, on the other hand, can fail to give enhanced performance. In this case, the smallest depth of pipeline required is one such that as the number of stages in the pipeline goes up, the frequency of the clock also goes up. The multiple pipeline stages can thus be enabled to get higher depth hence getting optimum frequency (Cheah, Fahmy & Kapre, 2014).

Comparing the CPU-Time of these Processors

The fact that unpipelined processor employs the controller with direct-mapped cache with no interlocked stages of pipeline makes it faster in terms of execution speed. Unpipelined processors also make use of very high speed integrated circuit hardware. This makes it have short execution time (short CPU time/ cycle) as compared to pipelined processors. However, the use of deep pipeline (maximum depth of pipeline) enhances the performance of the pipelined processors in terms of CPU time and frequency.


This paper is concerned with comparing pipeline versus unpipelined MIPS processors. The two types of processors are found to have good performance at different circumstances. Pipelined MIPS processors can perform better when the depth of the pipeline is increased since this also increases the frequency of the processor. The pipelined processor also performs better in terms of executing two or more instructions simultaneously as opposed to unpipelined processors. Nevertheless, the unpipelined MIPS processors also perform faster in terms of CPU time since it has a direct mapping of the controller cache to the CPU. The cache instructions together with the cache for data are detached are placed within the central part of the CPU. Therefore, the short CPU time used for the execution is due to the direct execution of instructions that takes place without any mapping.

References List

Bernardi, P., Cantoro, R., Ciganda, L., Du, B., Sanchez, E., Reorda, M. S., … & Ballan, O. (2013, December). On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors. In Microprocessor Test and Verification (MTV), 2013 14th International Workshop on (pp. 52-57). IEEE.

Bhor, P. B., Priya, R. A., & Malathi, P. (2014). Customized Processor Design and its Run Time Configuration.

Bhosle, P., & Moorthy, H. K. (2012). FPGA Implementation of Low Power Pipelined 32-bit RISC Processor. Proceedings of International Journal of Innovative Technology and Exploring Engineering (IJITEE), ISSN, 2278-3075.

Cheah, H. Y., Fahmy, S. A., & Kapre, N. (2014). Analysis and optimization of a deeply pipelined FPGA soft processor. In Proceedings of the International Conference on Field Programmable Technology (FPT) (pp. 235-238).

El Kateeb, A. (2013). Mote Design Supported with Remote Hardware Modifications Capability for Wireless Sensor Network applications. International Journal of Advanced Smart Sensor Network Systems (IJASSN), 3(3).

Han, S., He, X., & Li, C. (2012). An Implementation of 32-bit Pipelined MIPS Processor with Multiplication-and-Accumulation (MAC) Support.

Mahmood, H. S., & Omran, S. S. (2013, December). Pipelined MIPS processor with cache controller using VHDL implementation for educational purposes. In Electrical, Communication, Computer, Power, and Control Engineering (ICECCPCE), 2013 International Conference on (pp. 82-87). IEEE.

Park, H., Ko, Y. W., So, J., & Lee, J. G. (2013). Manycore Processor Education Platform with FPGA for Undergraduate Level Computer Architecture Class.

RAJENDRA, K. M. (2015). Implementation and Verification of a 7-Stage Pipeline Processor.

Get Professional Assignment Help Cheaply

Buy Custom Essay

Are you busy and do not have time to handle your assignment? Are you scared that your paper will not make the grade? Do you have responsibilities that may hinder you from turning in your assignment on time? Are you tired and can barely handle your assignment? Are your grades inconsistent?

Whichever your reason is, it is valid! You can get professional academic help from our service at affordable rates. We have a team of professional academic writers who can handle all your assignments.

Why Choose Our Academic Writing Service?

  • Plagiarism free papers
  • Timely delivery
  • Any deadline
  • Skilled, Experienced Native English Writers
  • Subject-relevant academic writer
  • Adherence to paper instructions
  • Ability to tackle bulk assignments
  • Reasonable prices
  • 24/7 Customer Support
  • Get superb grades consistently

Online Academic Help With Different Subjects


Students barely have time to read. We got you! Have your literature essay or book review written without having the hassle of reading the book. You can get your literature paper custom-written for you by our literature specialists.


Do you struggle with finance? No need to torture yourself if finance is not your cup of tea. You can order your finance paper from our academic writing service and get 100% original work from competent finance experts.

Computer science

Computer science is a tough subject. Fortunately, our computer science experts are up to the match. No need to stress and have sleepless nights. Our academic writers will tackle all your computer science assignments and deliver them on time. Let us handle all your python, java, ruby, JavaScript, php , C+ assignments!


While psychology may be an interesting subject, you may lack sufficient time to handle your assignments. Don’t despair; by using our academic writing service, you can be assured of perfect grades. Moreover, your grades will be consistent.


Engineering is quite a demanding subject. Students face a lot of pressure and barely have enough time to do what they love to do. Our academic writing service got you covered! Our engineering specialists follow the paper instructions and ensure timely delivery of the paper.


In the nursing course, you may have difficulties with literature reviews, annotated bibliographies, critical essays, and other assignments. Our nursing assignment writers will offer you professional nursing paper help at low prices.


Truth be told, sociology papers can be quite exhausting. Our academic writing service relieves you of fatigue, pressure, and stress. You can relax and have peace of mind as our academic writers handle your sociology assignment.


We take pride in having some of the best business writers in the industry. Our business writers have a lot of experience in the field. They are reliable, and you can be assured of a high-grade paper. They are able to handle business papers of any subject, length, deadline, and difficulty!


We boast of having some of the most experienced statistics experts in the industry. Our statistics experts have diverse skills, expertise, and knowledge to handle any kind of assignment. They have access to all kinds of software to get your assignment done.


Writing a law essay may prove to be an insurmountable obstacle, especially when you need to know the peculiarities of the legislative framework. Take advantage of our top-notch law specialists and get superb grades and 100% satisfaction.

What discipline/subjects do you deal in?

We have highlighted some of the most popular subjects we handle above. Those are just a tip of the iceberg. We deal in all academic disciplines since our writers are as diverse. They have been drawn from across all disciplines, and orders are assigned to those writers believed to be the best in the field. In a nutshell, there is no task we cannot handle; all you need to do is place your order with us. As long as your instructions are clear, just trust we shall deliver irrespective of the discipline.

Are your writers competent enough to handle my paper?

Our essay writers are graduates with bachelor's, masters, Ph.D., and doctorate degrees in various subjects. The minimum requirement to be an essay writer with our essay writing service is to have a college degree. All our academic writers have a minimum of two years of academic writing. We have a stringent recruitment process to ensure that we get only the most competent essay writers in the industry. We also ensure that the writers are handsomely compensated for their value. The majority of our writers are native English speakers. As such, the fluency of language and grammar is impeccable.

What if I don’t like the paper?

There is a very low likelihood that you won’t like the paper.

Reasons being:

  • When assigning your order, we match the paper’s discipline with the writer’s field/specialization. Since all our writers are graduates, we match the paper’s subject with the field the writer studied. For instance, if it’s a nursing paper, only a nursing graduate and writer will handle it. Furthermore, all our writers have academic writing experience and top-notch research skills.
  • We have a quality assurance that reviews the paper before it gets to you. As such, we ensure that you get a paper that meets the required standard and will most definitely make the grade.

In the event that you don’t like your paper:

  • The writer will revise the paper up to your pleasing. You have unlimited revisions. You simply need to highlight what specifically you don’t like about the paper, and the writer will make the amendments. The paper will be revised until you are satisfied. Revisions are free of charge
  • We will have a different writer write the paper from scratch.
  • Last resort, if the above does not work, we will refund your money.

Will the professor find out I didn’t write the paper myself?

Not at all. All papers are written from scratch. There is no way your tutor or instructor will realize that you did not write the paper yourself. In fact, we recommend using our assignment help services for consistent results.

What if the paper is plagiarized?

We check all papers for plagiarism before we submit them. We use powerful plagiarism checking software such as SafeAssign, LopesWrite, and Turnitin. We also upload the plagiarism report so that you can review it. We understand that plagiarism is academic suicide. We would not take the risk of submitting plagiarized work and jeopardize your academic journey. Furthermore, we do not sell or use prewritten papers, and each paper is written from scratch.

When will I get my paper?

You determine when you get the paper by setting the deadline when placing the order. All papers are delivered within the deadline. We are well aware that we operate in a time-sensitive industry. As such, we have laid out strategies to ensure that the client receives the paper on time and they never miss the deadline. We understand that papers that are submitted late have some points deducted. We do not want you to miss any points due to late submission. We work on beating deadlines by huge margins in order to ensure that you have ample time to review the paper before you submit it.

Will anyone find out that I used your services?

We have a privacy and confidentiality policy that guides our work. We NEVER share any customer information with third parties. Noone will ever know that you used our assignment help services. It’s only between you and us. We are bound by our policies to protect the customer’s identity and information. All your information, such as your names, phone number, email, order information, and so on, are protected. We have robust security systems that ensure that your data is protected. Hacking our systems is close to impossible, and it has never happened.

How our Assignment  Help Service Works

1.      Place an order

You fill all the paper instructions in the order form. Make sure you include all the helpful materials so that our academic writers can deliver the perfect paper. It will also help to eliminate unnecessary revisions.

2.      Pay for the order

Proceed to pay for the paper so that it can be assigned to one of our expert academic writers. The paper subject is matched with the writer’s area of specialization.

3.      Track the progress

You communicate with the writer and know about the progress of the paper. The client can ask the writer for drafts of the paper. The client can upload extra material and include additional instructions from the lecturer. Receive a paper.

4.      Download the paper

The paper is sent to your email and uploaded to your personal account. You also get a plagiarism report attached to your paper.

smile and order essaysmile and order essay PLACE THIS ORDER OR A SIMILAR ORDER WITH US TODAY AND GET A PERFECT SCORE!!!

order custom essay paper